1. Field of the Invention
The present invention relates to a trench capacitor having an insulation collar and a corresponding fabrication method.
2. Description of the Related Art
Integrated circuits (ICs) or chips use capacitors for the purpose of storing charge. One example of an IC which uses capacitors to store charges is a memory IC, such as, for example, a chip for a dynamic read/write memory with random access (DRAM). The charge state (xe2x80x9c0xe2x80x9d or xe2x80x9c1xe2x80x9d) in the capacitor represents a data bit in this case.
A DRAM chip contains a matrix of memory cells which are connected up in rows and columns. The row connections are usually referred to as word lines and the column connections as bit lines. The reading of data from the memory cells or the writing of data to the memory cells is realized by activating suitable word lines and bit lines.
A DRAM memory cell usually contains a transistor connected to a capacitor. The transistor contains two diffusion regions separated by a channel above which a gate is arranged. Depending on the direction of the current flow, one diffusion region is referred to as the drain and the other as the source. The designations xe2x80x9cdrainxe2x80x9d and xe2x80x9csourcexe2x80x9d are used mutually interchangeably here with regard to the diffusion regions. The gates are connected to a word line, and one of the diffusion regions is connected to a bit line. The other diffusion region is connected to the capacitor. The application of a suitable voltage to the gate switches the transistor on and enables a current flow between the diffusion regions through the channel in order thus to form a connection between the capacitor and the bit line. The switching-off of the transistor disconnects this connection by interrupting the current flow through the channel.
The charge stored in the capacitor decreases with time on account of an inherent leakage current. Before the charge has decreased to an indefinite level (below a threshold value), the storage capacitor must be refreshed.
Ongoing endeavors to reduce the size of storage devices foster the design of DRAMs that have a greater density and a smaller characteristic size, that is to say a smaller memory cell area. In order to fabricate memory cells which occupy a smaller surface region, smaller components, for example capacitors, are used. However, the use of smaller capacitors results in a reduced storage capacitance, which, in turn, can adversely affect the functionality and usability of the storage device. For example, sense amplifiers require a sufficient signal level for reliable read-out of the information in the memory cells. The ratio of the storage capacitance to the bit line capacitance is critical in determining the signal level. If the storage capacitance becomes too small, this ratio may be too small to generate a sufficient signal. Likewise, a smaller storage capacitance requires a higher refresh frequency.
One type of capacitor usually used in DRAMs is a trench capacitor. A trench capacitor has a three-dimensional structure formed in the silicon substrate. An increase in the volume or the capacitance of the trench capacitor can be achieved by etching more deeply into the substrate. In that case, an increase in the capacitance of the trench capacitor does not have the effect of enlarging the surface occupied by the memory cell.
A customary trench capacitor contains a trench etched into the substrate. The trench is typically filled with p+- or n+-doped polysilicon, which serves as one capacitor electrode (also referred to as storage capacitor). The second capacitor electrode is the substrate or a xe2x80x9cburied plate.xe2x80x9d A capacitor dielectric containing nitride, for example, is usually used to insulate the two capacitor electrodes.
A dielectric collar (preferably an oxide region) is produced in the upper region of the trench in order to prevent a leakage current or to insulate the upper part of the capacitor.
The capacitor dielectric in the upper region of the trench, where the collar is to be formed, is usually removed before the collar is formed, since the upper part of the capacitor dielectric is a hindrance to subsequent process steps.
In particular, this makes the etching of the gate interconnect more difficult, since the capacitor dielectric shields parts of the previously deposited gate polysilicon from the etching, which entails the risk of a short circuit between the gate interconnect and the trench capacitor.
Furthermore, the integration of the strap with respect to the transistor is made considerably more difficult if the capacitor dielectric is preserved on the trench sidewall. In that case, the contact area with respect to the drain diffusion region of the transistor is greatly reduced, which entails an increased contact resistance and corresponding resultant problems for the operation of the memory.
Finally, protruding capacitor dielectric promotes the formation of defects and dislocations, and, for example, pinholes are easily formed at the transition between the lower part of the collar and the upper part of the capacitor dielectric in the course of the subsequent high-temperature processes. Such imperfections impair the quality of the capacitor dielectric and are a significant source for the reduction of charge from the trench. This reduces the retention time of the trench capacitor and, consequently, adversely affects its functionality.
In order to circumvent these problems, the upper part of the capacitor dielectric should be removed, but only to an extent that is absolutely necessary, since the capacitor dielectric also advantageously serves as insulator and diffusion barrier.
It is accordingly an object of the invention to provide a trench capacitor with an insulation collar, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which provides an improved trench capacitor with an insulation collar in which the capacitor dielectric is removed only down to the necessary depth, rather than over the entire depth of the collar. It is a further object of the invention to provide a corresponding fabrication method.
With the foregoing and other objects in view there is provided, in accordance with the invention, a trench capacitor, particularly in a semiconductor memory, comprising:
a substrate having a trench formed therein with a trench wall and an upper region;
a region in the substrate defined as a first capacitor plate;
a dielectric layer on the trench wall defining a capacitor dielectric;
a conductive filling material, filled in the trench, defining a second capacitor plate; and
an insulation collar formed in the upper region of the trench;
whereby the dielectric layer surrounds the insulation collar at least partly.
In accordance with an added feature of the invention, a capacitor connection region is provided in the trench, and the dielectric layer is removed down to a depth of the capacitor connection region.
In accordance with an additional feature of the invention, an insulation trench region is provided in the trench, and the dielectric layer is removed down to a depth of the insulation trench region.
In accordance with a concomitant feature of the invention, the dielectric layer includes one or more oxide and nitride layers.
With the above and other objects in view there is provided, in accordance with the invention, a method for fabricating a trench capacitor, particularly for a semiconductor memory cell, which comprises the following steps:
forming a trench with trench walls, a lower region, and an upper region, in a substrate having a region serving as a first capacitor plate;
forming a first dielectric layer constituting a capacitor dielectric on the trench walls;
filling a lower region of the trench with a filling material in the lower region, the filling material constituting a second capacitor plate;
forming an insulation collar in the upper region of the trench on the first dielectric layer; and
filling the upper region of the trench with filling material.
In accordance with another mode of the invention, the insulation collar is formed from an oxide layer.
In accordance with again a further mode of the invention, a part of the insulation collar and of the first dielectric layer situated underneath is selectively removed in the upper region of the trench.
In accordance with again an added feature of the invention, a second dielectric layer is provided in a region where the insulation collar has been removed and on the filling material in the upper region of the trench.
In accordance with again an additional feature of the invention, an insulation trench region is formed in the upper region of the trench on the insulation collar and, if appropriate, on the second dielectric layer.
In accordance with again another feature of the invention, a capacitor connection region is provided in the region where the insulation collar has been removed and on the filling material in the upper region of the trench.
In accordance with again a further feature of the invention, an insulation trench region is provided in the upper region of the trench.
In accordance with a concomitant feature of the invention, the capacitor connection region is removed during the formation of the insulation trench region.
The idea on which the present invention is based is for the capacitor dielectric to be removed only where absolutely necessary, that is to say in the capacitor connection region. It may be necessary to remove the capacitor dielectric in the insulation trench region as well, due to the dictates of the fabrication process. This removal is achieved by introducing an insulation collar etching step after the sinking of the second polysilicon. In other words, the capacitor dielectric or the ONO layer is removed wherever the originally applied insulation collar, which is preferably composed of TEOS oxide, is also removed, with the result that the dielectric layer at least partly surrounds the insulation collar.
The method according to the invention has the advantage over the prior art approaches of being associated with considerable savings in respect of costs and time as a result of the insulation collar etching step being carried out after the sinking of the second polysilicon, that is to say at a later point in time compared with the prior art process. Moreover, problems at the interface between the two polysilicon fillings are considerably reduced.
A significant advantage of this procedure is the elimination of the disintegration of the successive processes of sinking-in etching of the polysilicon, the deposition of the collar oxide and etching of the collar, as prevails in the customary process. The process speed rises considerably as a result of this.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a trench capacitor with insulation collar and corresponding fabrication method, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.